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Operating Temperature Condition

Parameter

Symbol

Rating

Unit

Note

Operating Temperature

TOPER

0 to 85

℃

1,2

Note:

3. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the

measurement conditions, please refer to JESD51-2 standard.

4. At 0 - 85℃, operation temperature range are the temperature which all DRAM specification will be

supported.

Absolute Maximum DC Ratings

Parameter

Symbol

Value

Unit

Note

Voltage on VDD relative to Vss

VDD

-0.3 ~ 1.5

Voltage on VDDQ pin relative to Vss

VDDQ

-0.3 ~ 1.5

Voltage on VPP pin relative to Vss

VPP

-0.3 ~ 3.0

Voltage on any pin relative to Vss

VIN, VOUT

-0.3 ~ 1.5

Storage temperature

TSTG

-55~+100

℃

1,2

Note:

4. Stress greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at these or any other conditions

above those indicated in the operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect reliability.

5. Storage Temperature is the case surface temperature on the center/top side of the DRAM. For the

measurement conditions, please refer to JESD51-2 standard.

6. VPP must be equal or greater than VDD/VDDQ at all times.

AC & DC Operating Conditions

Recommended DC operating conditions

Parameter

Symbol

Rating

Unit

Notes

Min

Typ.

Max

Supply voltage

VDD

1.14

1.2

1.26

1, 2

Supply voltage for Output

VDDQ

1.14

1.2

1.26

1, 2

Wordline supply voltage

VPP

2.375

2.5

2.75

Note:

4. Under all conditions VDDQ must be less than or equal to VDD.

5. VDDQ tracks with VDD, AC parameters are measured with VDD and VDDQ tied together.

6. DC bandwidth is limited to 20MHz

Single-ended AC & DC input levels for Command and Address

Parameter

Symbol

DDR4-1600/1866/2133

Unit

Note

Min

Max

I/O Reference Voltage (CMD/ADD)

VREFCA(DC)

0.49*VDDQ

0.51*VDDQ

1,2

DC Input Logic High

VIH(DC)

VREF+0.075

VDD

DC Input Logic Low

VIL(DC)

VSS

VREF-0.075

AC Input Logic High

VIH(AC)

VREF+0.1

Note 1

AC Input Logic Low

VIL(AC)

Note 1

VREF-0.1

Note:

3. The AC peak noise on VREFCA may not allow VREFCA to deviate from VREFCA(DC) by more than ± 1%

VDD (for reference : approx. ± 12mV)

4. For reference : approx. VDD/2 ± 12mV

1 2 ... 17 18 19 20 21 22 23 24 25 26 27 28

DD relative to Vss 22
DDQ pin relative to Vss 22

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